18 research outputs found

    Load balancing for parallel forwarding

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    On Jitter and Reassembly Buffers in Deflection Networks

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    We investigate experimentally the performance of deflection networks for stream-oriented, jittersensitive traffic. It is a common belief that pure deflection networks are not suitable for real-time jitter-sensitive application, and networks based on a connection-oriented paradigm are the only solution is such cases. We argue to the contrary and present simulation results supporting our claims. 1 Introduction By a pure deflection network we understand a switching network that never loses a packet at an intermediate switch because of a limited buffer space. Packets that at the moment of arrival cannot be relayed via their preferred routes (because those routes are busy) are deflected, i.e., relayed via suboptimal routes. This concept, traditionally illustrated by the Manhattan-street networks (MSN) introduced and analysed by Maxemchuk in [8, 9, 10, 11, 12], works under the assumption that the amount of buffer space available at a switch is sufficient to determine the route preference of..

    An Adaptive Feedback Control Based Cell Scheduler for ATM Networks

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    We describe a cell scheduler for ATM networks based on a predictive adaptive feedback control methodology, whose goal is to maintain the quality of service (QoS) of a set of calls at the desired level, in spite of traffic fluctuations and/or deviations of the actual traffic parameters from those specified at call setup. The scheme is quick and effective and its performance is independent of the distance between the source and the switch, which makes it ideal for high-speed wide-area networks, in contrast to other (reactive) flow control strategies.

    Modeling Atm Networks In A Parallel Simulation Environment: A Case Study

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    This paper describes our experience with implementing an Asynchronous Transfer Mode (ATM) network simulator in the high-level sequential programming language SMURPH [Dobosiewicz and Gburzynski 93], and then porting it to SimKit---a parallel simulation tool offering a C++ interface to a shared-memory implementation of the well-known Time Warp [Jefferson 85] concept. The work was undertaken as part of the TeleSim project, which aims to build a set of multi-purpose highfidelity ATM simulation tools for execution in sequential and parallel environments. 1 Introduction ATM is a connection-oriented packet-based switching technology designed for high-speed networks. Designing a simulator for ATM networks is not a well-defined task, because ATM is a networking concept rather than a single networking solution. Owing to the lack of a complete specification, our network model is made up of two distinct components with different requirements: a model of the generic ATM network hardware, i.e., the..

    An Adaptive Feedback Control Based Cell Scheduler for ATM Networks

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    We describe a cell scheduler for ATM networks based on a predictive adaptive feedback control methodology, whose goal is to maintain the quality of service (QoS) of a set of calls at the desired level, in spite of traffic fluctuations and/or deviations of the actual traffic parameters from those specified at call setup. The scheme is quick and effective and its performance is independent of the distance between the source and the switch, which makes it ideal for high-speed wide-area networks, in contrast to other (reactive) flow control strategies. 1 Introduction The cell scheduling disciplines proposed in the literature for ATM switches may be divided into two categories. The first category has one scheduler for each output port. The traffic for this output port may be placed in several queues. The scheduler considers all the queues at the same time in order to determine the next cell to be transmitted. Scheduling policies that fall into this category are Virtual Clock [14], Stop-and..

    PicOS: A Tiny Operating System for Extremely Small Embedded Platforms

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    We present a certain programming paradigm for implementing low-footprint applications on small embedded platforms and a tiny operating system based on that paradigm. The primary objective of our work was to create a friendly environment for rapid, reliable, and efficient deployment of customizable microcontroller applications primarily (but not necessarily) aimed at the wireless world. The proposed solution, while being characterized by very small resource requirements, offers an interesting flavor of multithreading and provides for well-structured self-documenting layout of the application code
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